CK610 is the second-generation CPU of CSKY, fullycompatible with M*Core.Itdelivers for medium/high-end embedded applicationswitha dual-issuesuperscalar pipelineto realizehighperformance and low power. CK610 series processorsgenerally include CK610, CK610E, CK610S, CK610M, CK610-F and CK610ESM. CK610 is fully compatible with CK500 on instruction and operating environment.
· Reduced instruction set computer architecture;
· 16-bit instruction, 32-bit data path;
· 8-stage pipeline, dual-issue architecture;
· 2ALUs, 2Shifters, 1MAD and 1LSU;
· Two-way associative instruction cache and data cache;
· Two-level branch prediction, 2Kb branch history table (BHT);
· Non-blocking instruction issue and non-blocking data cache;
· Data cache supports write-through and write-back mode;
· Reservation station based Out-of-Order speculative execution mechanism;
· Return address prediction with a4-entry return address stack;
· Dual common data bus (CDB);
· AHB/AXIbus interfacewith configurable data width(32/64/128);
· Extensible coprocessor interface;
· Performance: 1.82DMIPS/MHz.
CK610’s main hardcore parameters
|Process||0.13um||90nm (G)||65nm(LP)||40nm (LP）|
|Cache size (KB)||8/8K||2/2K||16/16K||16/16K||16K/16K|
CK610’s application fields
CK610 is mainly designed for medium/high-end embedded applications, such as smartphone, digital television, STB (Set Top Box), automotive electronics, GPS, e-reader and printer.
CK610’s module structure diagram
CK610 implements an8-stagepipelinewith dual-issue architecture. CK610 is designed with branch prediction and speculative out-of-order execution mechanism to fully utilize instruction level parallelism and achievehigh performance. Based on the configurable and extensible design principle, CK610 provides rich configurable options which includesize of on-chip cache, size of scratchpad memory, MGU/MMU, AHB/AXI bus interface, coprocessor interface, DSPenhanced unit and so on. CK610 reserves extensible instruction space for users to support user-defined instruction extension.
Characteristics of various CK610 models
· CK610: CK610’s basic core;
· CK610E: supports DSP enhanced instruction subset;
· CK610S: supports data SPM and instruction SPM;
· CK610M: supports memory management unit (MMU);
· CK610-F: supports floating-point coprocessor unit.
Floating-point coprocessor CK-Float
· Compatible with IEEE-754 floating-point arithmetic standard;
· Supports single precision and double precision data types;
· Supports four rounding modes;
· Supports two operating modes including fast running and exception trapping;
· Supports SIMD architecture of single-precision floating-point arithmetic;
· In-order issue, out-of-order execution, out-of-order retirement of floating-point instructions;
· Three execution pipelines including ALU, multiplication / multiply-accumulation, and division/square root;
· Supports precise exception and interrupt interaction with core pipeline.